Pre-distortion technique for a circuit arrangement with an amplifier

ABSTRACT

A circuit includes an amplifier and pre-distortion circuit. The amplifier amplifies a modulated signal. The signal pre-distortion circuit performs a feed-forward pre-distortion of the modulated signal in a signal path in which the amplifier resides. The signal pre-distortion circuit includes: i) an envelope detector configured operative to provide an envelope information describing an envelope of the modulated signal; and ii) a built-in test circuit that determines distortion information describing a distortion in the signal path caused by amplitude variations. The signal pre-distortion circuit performs the feed-forward pre-distortion of the modulated signal on the basis of the distortion information.

RELATED APPLICATION

This application is related to and claims priority to earlier filedGerman patent application serial number 10 2018 220101.3 entitled“PRE-DISTORTION TECHNIQUE FOR A CIRCUIT ARRANGEMENT WITH AN AMPLIFIER,”filed on Nov. 22, 2018, the entire teachings of which are incorporatedherein by this reference.

TECHNICAL FIELD

The present document relates to circuit arrangements having amplifiers(e.g., radio frequency, RF, amplifiers, high frequency, HF, amplifiers,mmWave amplifiers, etc.), such as power amplifiers.

The document also relates to techniques for adjusting (e.g., bypre-distortion) phase shift and/or gain in a circuit arrangement havingan amplifier (e.g., a power amplifier), such as a radio frequency, RF,amplifier, high frequency, HF, amplifier, mmWave amplifier, and so on.The circuit arrangement may be used, for example, for a beamformingapplication. The techniques may be, for example, feed-forwardtechniques.

The document also relates to methods for adjusting phase shift and/orgain in a circuit arrangement having an amplifier (e.g., poweramplifier), such as a radio frequency, RF, amplifier, high frequency,HF, amplifier, mmWave amplifier, and so on.

BACKGROUND

A circuit arrangement with an amplifier (e.g., power amplifier), such asa RF amplifier, HF amplifier, mmWave amplifier, and so on, may be used,for example, for feeding an antenna element. The antenna element mayconstitute, together with other antenna elements, an antenna array. Theantenna array may be used for beamforming, e.g., in communication orlocalization applications.

In order to minimize power consumption, the efficiency shall be high.However, in particular for power amplifiers, increasing efficiency tendsto reduce linearity, causing amplitude distortion and/or phasedistortion. For example, at some ranges of values of the input signal,the amplified signal may saturate, hence losing linearity and increasingdistortion. Therefore, an increase of efficiency normally comes at theexpenses of linearity and quality.

It is possible to try to cope with these impairments by using a digitalpre-distortion technique. The signal at the output of the amplifier maybe converted into a digital version, which is fed back and subtractedfrom the digital input signal. The feedback-based pre-distortiontechnique may be operated so as to prevent the digital input signal fromreaching the frequency ranges at which it would saturate, hencepreserving linearity.

Such a digital feedback-based pre-distortion technique requiresdedicated hardware equipment. For example, the signal at the output ofthe amplifier shall be converted into a digital version, and provided toa digital signal processor, DSP, for performing the subtraction. Hence adownconverter and an analog-to-digital converter, ADC, or aRF-to-digital converter, operating in real time is needed. The ADC or RFto digital converter is necessary for each antenna element of theantenna array: accordingly, 64 antenna elements require 64 ADCs orRF-to-digital converters.

Further, a great amount of processing power is necessary for performingthe online subtractions at the DSP.

Moreover, in order to reduce the number of components such as DSPs,ADCs, RF-to-digital converters, DACs, and digital-to-RF converters, atechnique has been attempted consisting in performing one single digitalpre-distortion for multiple amplifiers (e.g., power amplifiers).However, it is in general not ensured that all the amplifiers aresubject to the same distortions. Hence, using one single digitalpre-distortion for multiple, different amplifiers inherently leads toincorrect or suboptimal pre-distortions for at least some of theamplifiers.

It is desirable to find a way to implement a pre-distortion principlethat solves at least one of these problems, to advantageously reduce orget rid of unwanted amplitude and/or phase distortions.

BRIEF DESCRIPTION OF EMBODIMENTS

In accordance to an aspect, there is provided a circuit arrangement,comprising:

-   -   an amplifier (e.g., RF, HF, mmWave amplifier) to amplify a        modulated signal (e.g., RF, HF, mmWave signal);    -   a signal pre-distortion circuit to perform a feed-forward        pre-distortion of the modulated signal in a signal path        comprising the amplifier, the signal pre-distortion circuit        includes:    -   an envelope detector operative to provide an envelope        information describing an envelope of the modulated signal; and    -   a built-in test circuit configured to determine a distortion        information describing a distortion in the signal path caused by        amplitude variations;    -   the signal pre-distortion circuit is operative to perform the        feed-forward pre-distortion of the modulated signal on the basis        of the distortion information so that:    -   a variable phase shift is applied to a signal in the signal path        in dependence on the envelope information, such that a        relationship between the envelope information and the variable        phase shift depends on the distortion information provided by        the built-in test circuit; and/or    -   a gain of a signal in the signal path is controlled in        dependence on the envelope information, such that a relationship        between the envelope information and a gain control signal        depends on the distortion information provided by the built-in        test circuit.

Accordingly, there is no need for a digital feedback from the outputsignal. To the contrary, the feedforward technique may be easilyimplemented reducing the computation efforts. In particular when analogcomponents are used, it is possible to reduce the number of DACs,digital-to-RF converters, ADCs and RF-to-digital converters.

In particular for applications using a plurality of amplifiers, eachbeing subject to distortion, it is possible to make use of one singleprocessor and one related RF to digital chain. It is not necessary touse multiple processors for multiple circuit arrangements.

The operation session may include:

-   -   determining the envelope of the input signal;    -   on the basis of the determined relationships, mapping the        envelope into a phase shift and/or amplitude adjustment so as to        shift the phase and/or adjust the amplitude of the input signal.

There is also provided a method for feeding an antenna array feeding anantenna array with the amplified output signals generated in theoperation session.

There is also provided a non-transitory storage unit includinginstructions which, when performed by a processor, cause the processorto operate according to one of the methods above.

Further embodiments herein include:

-   -   A circuit arrangement comprising:        an amplifier to amplify a modulated signal;        a signal pre-distortion circuit to perform a feed-forward        pre-distortion of the modulated signal in a signal path        comprising the amplifier, the signal pre-distortion circuit        including:        an envelope detector operative to provide envelope information        describing an envelope of the modulated signal; and        a built-in test circuit operative to determine distortion        information describing a distortion in the signal path caused by        amplitude variations;        the signal pre-distortion circuit being operative to perform the        feed-forward pre-distortion of the modulated signal based on the        distortion in-formation in which:        a variable phase shift is applied to a signal in the signal path        dependent on the envelope information, and a relationship        between the envelope information and the variable phase shift        being de-pendent on the distortion information provided by the        built-in test circuit; and        a gain of a signal in the signal path is controlled dependent on        the envelope information, in which a relationship between the        envelope information and a gain control signal depends on the        distortion information provided by the built-in test circuit.

In accordance with further embodiments, the signal pre-distortioncircuit is operative to adjust the variable phase shift to followinstantaneous envelope information and provide a gain control signal tofollow instantaneous envelope information.

In accordance with still further embodiments, the envelope detector isoperative to provide the envelope information as an analog envelopesignal, the circuit arrangement further comprising: a mapping circuitoperative to: map the analog envelope signal onto an analog phase shiftadjustment signal, and adjust a mapping characteristic, depending on thedistortion information; and map the analog envelope signal onto ananalog gain control signal, and adjust a mapping characteristic,depending on the distortion information.

In yet further example embodiments, the signal pre-distortion circuitincludes a mapping circuit operable to: i) obtain a non-linear,adjustable mapping characteristic, and ii) adjust the non-linearmap-ping characteristic depending on the envelope information.

In still further example embodiments, the signal pre-distortion circuitis operative in which bandwidths of at least one selected from: anenvelope detector, a mapping circuit, a signal phase shifter, and a gainadjuster are larger than modulation bandwidth of a modulation imposed onthe modulated signal.

In yet further example embodiments, the signal pre-distortion circuit isoperative in which bandwidths of at least one selected from: an envelopedetector, a mapping circuit, a signal phase shifter, and a gain adjusterare larger than or equal to two times the modulation band-width imposedon the modulated signal.

In accordance with further example embodiments, the signalpre-distortion circuit is operative to modify the gain of the amplifierdepending on the envelope information, and a relationship between theenvelope in-formation and in which the gain depends on the distortioninformation.

In yet further example embodiments, the built-in test circuit isoperative to determine the distortion information which comprisesin-formation about an amplitude-modulation-to-amplitude-modulationdistortion and an information about anamplitude-modulation-to-phase-modulation distortion.

In accordance with further embodiments, the built-in test circuit isoperative to determine, in a test mode, an amplitude at the output ofthe amplifier to derive distortion information and a phase at the outputof the amplifier to derive distortion information.

In one embodiment, a test signal source is operative to inject a testsignal having a settable amplitude in which the built-in test circuitmeasures distortion information relative to the signal at the output ofthe amplifier.

In still further embodiments, the circuit switches between a test modeand an operating mode, thereby, in the test mode, measure distortioninformation and determine an adjustable relationship between envelopeinformation and the variable phase shift and the gain control signal.

In accordance with yet further example embodiments, the circuit isfurther operative to generate, in the test mode, a plurality of testsignals at different amplitudes.

In accordance with further example embodiments, the signalpre-distortion circuit is operative to define the distortion informationwhich comprises information associated to a state which, in the testmode, reduces distortion of the output test signal.

In accordance with further embodiments, the signal pre-distortioncircuit is operative to comparatively increase the phase shift andreduce the amplitude of a signal in the signal path for a comparativelyhigher envelope, and comparatively reduce the phase shift and increasethe amplitude of a signal in the signal path for a comparatively lowerenvelope.

In accordance with further embodiments, the signal pre-distortioncircuit is operative to: adjust the variable phase shift and theamplitude of a signal in the signal path for a comparatively higheramount in case of comparatively higher distortion information, andadjust the variable phase shift and the amplitude of a signal in thesignal path for a comparatively lower amount in case of a comparativelylower distortion information.

In accordance with further example embodiments, the circuit furthercomprises a chip structure including a calibration processor operativeto: i) measure the distortion information from the output of theamplifier and ii) control a map-ping between the envelope informationand the variable phase shift and the gain control signal.

In accordance with further example embodiments, the circuit as describedherein includes a chip structure or a board structure including thesignal pre-distortion circuit.

In still further example embodiments, the circuit comprises a pluralityof amplifiers in which the circuit arrangement comprises a common signalsource, the circuit arrangement is operative to derive a plurality ofsignals to be amplified by the amplifiers from an input signal providedby the common signal source, and the signal pre-distortion circuit isoperative to subject each of the derived signals to a pre-distortion onthe basis of distortion information associated to each of theamplifiers.

In accordance with further example embodiments, embodiments hereininclude a method for applying a variable phase shift and adjusting theamplitude of an input signal subjected to amplification by an amplifier,the method comprising:

a calibration session and an operation session,

the calibration session including:

producing distortion information regarding the distortion of a testsignal;

determining relationships between envelopes of the test signal and aphase shift and amplitude adjustment to be applied to the input signalin the operation session based on the distortion information; and theoperation session further including:

determining an envelope of the input signal;

mapping the envelope into a phase shift and amplitude adjustment toshift the phase and adjust the amplitude of the input signal based onthe determined relationships.

In accordance with further embodiments, the calibration sessions areperformed at intervals equal to or greater than 3600 seconds.

In further example embodiments, the calibration session furthercomprises performing a plurality of iterations, each iterationdetermining distortion information of one particular amplifier among aplurality of amplifiers.

Further embodiments herein include a method for beamforming, comprisinga method including: feeding an antenna array with the amplified outputsignals generated in the operation session.

In accordance with further example embodiments, a non-transitory storageunit storing instructions which, when executed by a processor, cause theprocessor to perform any method as described herein.

BRIEF DESCRIPTION OF DRAWINGS

FIGS. 1A-6 show circuit arrangements or components thereof according toexamples;

FIG. 7 shows a graph showing a result of an experiment;

FIG. 8 shows a method according to an example.

DETAILED DESCRIPTION

FIG. 1a shows an example of circuit arrangement 100. The circuitarrangement 100 may comprise an amplifier 110 (e.g., a RF poweramplifier, a HF power amplifier or a mmWave power amplifier) whichamplifies an input signal 102 (or a processed version thereof), togenerate an analog output signal 104 (e.g., RF, HF, or mmWave signaloutput). The analog output signal 104 may be fed, for example, to anantenna (e.g., RF, HF, or mmWave antenna), such as an antenna element ofan antenna array. The amplified signal 104 may be a processed and/oramplified version of an input signal 102 (e.g., a RF input signal, HFinput signal, or mmWave input signal). The input signal 102 may be ananalog signal. The input signal 102 may be a modulated signal (e.g., aRF modulated input signal, HF modulated input signal, or mmWavemodulated input signal).

A signal path 108 may be used to describe processing applied to theinput signal 102 (or a version thereof) up to the amplifier 110. Ingeneral terms, along the signal path 108, several versions (e.g., analogversions) of the input signal 102 (e.g., intermediate versions 114 and118) are processed to generate the final version to be amplified togenerate the amplified signal 104.

As such, the amplifier 110 may be subjected to unrequested amplitudevariations, which tend to reduce linearity. However, it has been notedthat these variations can be compensated even without a feedback-basedtechnique.

In order to condition the input signal 102 (or another version thereof)in the signal path 108, a signal pre-distortion circuit 180 may beimplemented. The signal pre-distortion circuit 180 may operate upstreamof the amplifier 110 (in some variants the pre-distortion circuit may inparticular directly operate on the amplifier 110). The signalpre-distortion circuit 180 may operate in feed-forward. The signalpre-distortion circuit 180 may comprise a plurality of elements, atleast one of which may be a hardware element. The signal pre-distortioncircuit 180 may comprise at least one analog element. The at least oneanalog element may internally operate analogically and may be input withand/or output analog signals. In examples, the signal pre-distortioncircuit 180 may comprise at least one element, which may internallyoperate digitally, but may be input with and/or output an analog signal(and, therefore, integrates DACs and/or digital-to-RF converters and/orADCs and/or RF-to-digital converters).

The signal pre-distortion circuit 180 (or at least some componentsthereof) may coexists with the amplifier 110 in the same board (or inthe same chip). The signal pre-distortion circuit 180 may comprise (ormay be fully or partially integrated in) at least one built-in circuit122, which may coexist with the amplifier in the same board (or chip).

The signal pre-distortion circuit 180 may comprise, in the signal path108, components which permit to modify the input signal 102 without afeedback-based technique and without excessively reducing linearity.

The signal pre-distortion circuit 180 may comprise, in the signal path108, a variable phase shifter 112 to provide a phase-shifted version 114of the input signal 102. The phase shifter 112 may shift the phase ofthe signal 102 so as to compensate for the unwanted phase variationsnormally caused by the amplifier 110. The phase shifter 112 may be ananalog component and/or may internally operate analogically and/or mayprovide an analog output. The phase shifter 112 may comprise aresistor-capacitor, RC, circuit, with a variable capacitance. E.g., thephase shifter 112 may comprise multiple capacitors in parallel, at leastsome capacitors being selectable, so as to vary the total capacitance ofthe parallel. In some examples, the phase shifter 112 may be controlleddigitally.

The signal pre-distortion circuit 180 may comprise, in the signal path108, a gain adjuster 116 to provide an amplitude-adjusted version 118 ofthe input signal 102. The gain adjuster 116 may modify the amplitude ofthe input signal 102 (or its phase-shifted version 114) so as tocompensate for the unwanted amplitude variations normally caused by theamplifier 110. The gain adjuster 116 may be an analog component and/ormay internally operate analogically and/or may provide an analog output.The gain adjuster 116 may comprise, for example, an analog amplifierwith a controllable gain.

In alternative examples, the phase shifter 112 may be positioneddownstream to the gain adjuster 116.

FIG. 1A does not show possible additional elements. For example, a delaygenerator may be inserted (e.g., upstream or downstream) to control thebeamforming.

It has been understood that, even without a digital feedback from theoutput signal 104, the consequences of the non-linearity of theamplifier 110 may be reduced or avoided. This result has been achieved,inter alia, on the basis of the understanding that a feed-forwardtechnique may be used instead of a feedback-based one. Therefore, theamount of the phase shift and/or the amount of gain adjustment may bedetermined on the basis of the input signal 102, instead of theamplified output signal 104.

For example, it is possible to perform a pre-distortion by adjusting thephase shift and/or the gain to follow envelope information which isinstantaneously determined from the signal 102. In fact, the amount ofthe phase shift and/or the amount of gain adjustment can be determinedon the basis of envelope information describing the envelope of theinput signal 102. In general terms, the larger the envelope of the inputsignal 102, the larger will be the envelope of the amplified signal 104,the larger the non-linearity, which will require a strongerpre-distortion. Therefore, the pre-distortion may be provided so that,for larger envelopes, the phase and/or the gain of the signal in thesignal path 108 are modified more than for smaller envelopes so as tocompensate for the incorrect amplification. A non-linear adjustment maytherefore be obtained. The compensation may be achieved even withoutrelying on a feedback from the output of the amplifier 110.

In order to instantaneously obtain the envelope information, the circuitarrangement 100 may comprise an envelope detector 120. The envelopedetector 120 may detect the envelope of the input signal 102. Theenvelope detector may be an analog component and/or may internallyoperate analogically and/or may provide an analog output. The envelopedetector 120 may comprise a low-pass filter for detecting the envelopeof the input signal 102. The envelope information may produce a signal(indicated with 124) shaped as (or otherwise providing information on)the envelope of the input signal 102. The envelope signal 124 may be,for example, an analog signal (but in other examples may be a digitalsignal).

The envelope signal 124 may be mapped onto a phase shift adjustmentsignal 128 (which may be, for example, an analog signal or a digitalsignal). The phase shift adjustment signal 128 may be provided to thephase shifter 112 to condition the input signal 102 on the basis of theenvelope signal 124. In general terms, values of the envelope of theinput signal 102 may be mapped into values of the shift adjustmentsignal 128, which will be used by the phase shifter 112 to determine thephase shift to be imposed to the input signal 102. The element 126 isthe element, which generates the phase shift adjustment signal 128. Theelement 126 may be an analog component and/or may internally operateanalogically and/or may provide an analog output (phase shift adjustmentsignal 128). The element 126 may be an analog mapping circuit, whichmaps the envelope analog signal 124 onto the analog phase shiftadjustment signal 128, for example. The mapping may be non-linear, as itis intended to compensate for non-linearities: in case of smallenvelope, the phase shifter 112 may avoid to modify the input signal 102substantially; but, in case of larger envelope, the phase shifter 112may modify the phase of the input signal 102 for a great amount. In someexamples, the element 126 may therefore be an amplifier withnon-constant gain, and may have gain which increases with the increaseof its input signal (envelope information 124). In other examples theelement 126 has a linear behavior, and a non-linear behavior isexhibited by the phase shifter 112.

The envelope signal 124 may be mapped onto a gain control signal 132(which may be, for example, an analog gain control signal or a digitalsignal). The gain control signal 132 may be provided to the gainadjuster 116 to condition the input signal 102 (or its phase-shiftedversion 114 or another version in the signal path 108) on the basis ofthe envelope signal 124. In general terms, values of the envelope of theinput signal 102 may be mapped into values of the gain control signal132, which will be used by the gain adjuster 116 to determine anamplification to be imposed to the input signal 102 (or itsphase-shifted version 114 or another version in the signal path 108).The element 130 (which is here the generator of the gain control signal132) may be an analog component and/or may internally operateanalogically and/or may provide an analog output (phase gain controlsignal 132). (In other examples, the element 130 may be a digitalelement.) The element 130 may be an analog mapping circuit which mapsthe envelope analog signal 124 onto the analog gain control signal 132.For example, an increase of the envelope signal may cause a reduction ofthe gain at the gain adjuster 116. The mapping may be non-linear, as itis intended to compensate for non-linearities: in case of smallenvelope, the gain adjuster 116 may avoid to modify substantially theamplitude of the input signal 102; but, in case of larger envelope, thegain adjuster 116 may modify substantially the amplitude of the signal(e.g., its version 114) in the signal path 108. In other examples, it isthe gain adjuster 116 that has a non-linear behavior, while the element130 is linear.

The mapping circuits 126 and 130 are collectively indicated with thereference numeral 125, and may be part of the built-in test circuit 122.They define a relationship between the envelope of the input signal 102and the parameters for the pre-distortion.

While the phase shift adjustment signal 128 and/or gain control signal132 may follow, in real time, instantaneous values of the envelope, themapping functions from the envelope to the adjustment signals 128 and/or132 do not vary instantaneously and are in general maintained for longperiods of time.

The signal pre-distortion circuit 180 of the circuit arrangement 100 mayadjust the relationships between the envelope information 124 and thevariable phase shift (applied by the phase shifter 112) and/or the gain(applied by the gain adjuster 116). For example, the mapping functionsdefining the relationship between the envelope information 124 and theadjustment signals 128 and 132 may be determined (e.g., a priori) on thebasis of distortion information which is provided by a built-in testcircuit 122. The built-in test circuit 122 may comprise a test processor134 which may provide phase-related distortion information 136 (e.g.,information about an amplitude-modulation-to-phase-modulationdistortion) and/or gain-related distortion information 138 (e.g.,information about an amplitude-modulation-to-amplitude-modulationdistortion). Therefore, the mapping functions adopted at the components126 and 130 may be adjusted on the basis of the distortion information136 and/or 138. The distortion information 136 and/or 138 may be orcomprise digital signal(s) generated by the test processor 134 andconverted into analog signal(s) by digital-to-analog converter(s), notshown in FIG. 1.

The relationships between the envelope and the adjustment signals 128and/or 132 may be determined occasionally and/or at sporadic timeinstants, and may be maintained without real-time feedback-basedtechniques. For example, test (calibration) sessions may be performed atthe initialization of the circuit arrangement 100 and/or when thecircuit arrangement is switched on and/or (e.g., periodically) at afrequency enormously greater than the bandwidth of the input signal 102.In some examples, test sessions may be performed at time intervals of 1hour (3600 seconds) or more. In some examples, a test session may beperformed when the circuit arrangement 100 is in a test mode. In testmode, a signal source of the circuit arrangement 100 may inject apredefined signal as the input signal, and the output signal obtainedwith the injected signal is measured. The sampled values of the measuredsignal may be compared to a predetermined set of expected values, as todetermine the mappings to be performed by components 126 and/or 130 tosubsequently control the phase shifter 112 and the gain adjuster 116 onthe basis of the envelope information 124. Therefore, the distortioninformation provided by the signals 136 and/or 138 may be obtainedduring calibration, and subsequently maintained until a new calibrationis performed.

The signal pre-distortion may be performed so that the phase shiftand/or the amplitude is adjusted for a comparatively higher amount incase of comparatively higher distortion information, and for acomparatively lower amount in case of a comparatively lower distortioninformation.

In general the phase shifter 112 and/or the gain adjuster 116 maycompensate the amplitude variations caused by the amplifier 110according to a feed-forward strategy which keeps into account, besidesthe instantaneous value of the envelope information 124, also specificdistortion information 136 and/or 138 previously defined during acalibration session.

Accordingly, unwanted distortion of the amplifier 110 is compensated online, without excessively wasting processing power. When thecompensation is performed analogically, no increase of hardwareequipment is required, as the necessity of DACs or digital-to-RFconverters and ADCs or RF-to-digital converter is reduced. Notably, onesingle test processor may be used for multiple amplifiers (e.g., poweramplifiers), as it is possible to subject one single amplifier to onetest session at time, and to derive the distortion informationindividually. With respect to the feedback-based technique, an importantreduction of hardware and/or software resources may therefore beachieved when only analog components are used.

In examples, bandwidths of the envelope detector 120 or the mappingcircuit 126, 130 and/or phase shifter 112 are larger than the modulationbandwidth of a modulation imposed on the modulated signal 102, or, insome particular examples, larger than or equal to two times themodulation bandwidth.

FIG. 1B shows a variant of a circuit arrangement 100 b with a signalpre-distortion circuit 180 b, in which most of the constructive andfunctional elements are analogous to those of the circuit arrangement100 of FIG. 1a . Here, however, the amplifier 100 b (e.g., poweramplifier which may be a RF power amplifier, a HF power amplifier, or ammWave power amplifier) may be directly controlled by the mappingcircuit 130 (e.g., an analog mapping circuit). For example, the gain ofthe amplifier 100 b may be controlled on the basis of the gain controlsignal 132 b (e.g., analog gain control signal) mapping the envelopeinformation 124 (e.g., analog envelope information). Therefore, on thebasis of the value of the gain control signal 132 b, the amplificationimposed to the signal 118 (or another version of the signal in thesignal path 108) may be adjusted. The amplifier 100 b may be aprogrammable gain amplifier (the amplifier may be controlled by ananalog input, for example).

In other examples, other types of the phase shifter 112 and/or the gainadjuster 116 may be adopted. There are known analog phase shifters forwhich a non-linear mapping characteristic may be defined on the basis ofan input: in that case, the analog mapping circuit 126 may be linear.The gain adjuster 116 may also be non-linear: in that case, the analogmapping circuit 126 may be linear.

In other examples, a non-linear version of the phase shifter 112 may becontrolled directly from the envelope detector 120: the mapping circuit126 may therefore be avoided, or may be understood as being incorporatedinto the phase shifter 112. Analogously, a non-linear version of thegain adjuster 116 may be controlled directly from the envelope detector120: the mapping circuit 130 may be avoided, or may be understood asbeing incorporated into the gain adjuster 116.

Even if FIGS. 1A and 1B have referred to both the adjustment of thephase and the amplitude, it is possible to implement a signalpre-distortion circuit which only adjusts the phase or only adjusts thegain. The former may be implemented, in FIG. 1a , by avoiding the gainadjuster 116 and the element 130 (and by avoiding the provision of thedistortion information 138), while the latter may be implemented byavoiding the phase shifter 112 and the element 126 (as well as theavoiding the provision of the distortion information 136).

FIG. 2 shows the circuit arrangement 100, 100 b and highlights theelements which are used to determine distortion information 136 and/or138. The circuit arrangement 100, 100 b may be switched between:

-   -   an operating mode, in which the input signal is processed in the        signal path 108 to be transmitted as output signal 104 (FIGS.        1A, 1B); and    -   a test mode, in which the distortion information 136 and/or 138        is determined (FIG. 2).

Here, a signal source 206 is represented as injecting an input signalonto the signal path 108. In the test mode the input signal is indicatedwith 102′ to be distinguished from the normal input signal 102 used inthe operating mode. The test input signal 102′ may have a settableamplitude, so as to permit the built-in test circuit 122 to measuredistortion information at different amplitudes. The signal source 206may be controlled by a control signal 203 output by the test processor134. For example, the test processor 134 may command the signal source206 to sweep among a plurality of amplitudes of the test input signal102′. The signal source 206 may be, in some cases, the same signalsource 206 which normally generates the signal 106 in operating mode, ormay in alternative be part of the built-in test circuit 122 (e.g., itmay be integrated in the same test processor 134) or may be an externalsource.

FIG. 2 shows that the built-in test circuit 122 (or in particular thetest processor 134) may output a mode control signal 202, which maycontrol the functionalities of other elements of the circuit arrangement100, so as to switch between the test mode and the operating mode. Forexample, if the mode control signal 202 indicates that the circuitarrangement 100, 100 b is in operating mode, the signal source 206 maybe deactivated by the switch 204. The mode control signal 202 may, inaddition or alternative, be provided to other elements, such as to anyof the envelope detector 120, the phase shifter 112, the gain adjuster116, the amplifier 110 or 110 b, and any of the mapping circuits 126 and130. As for FIG. 2, at least ideally, the mode control signal 202 maycontrol a switch 205 which is closed in the test mode and open in theoperating mode. When the switch 205 is closed, the built-in test circuit122 may receive the amplified test signal 104′ at the output of theamplifier 110. In particular, the test processor 134 may compare thetest signal 102′ (as generated by the signal source 206) with theamplified test signal 104′ (as obtained from the amplifier 110), so asto determine the distortion caused by the amplifier 110 for eachenvelope of the input test signal 104′.

A digital-to-RF converter (or a DAC) 208 may be provided downstream tothe signal source 206. The signal source 206 (e.g., in cooperation withthe digital-to-RF converter 208) may be configured to inject a testsignal 102′ (e.g., an analog signal) having at a settable amplitude. Theamplitude may be controlled by the test processor 134, e.g., through acontrol signal 203. The test signal 102′ may be subjected to theprocessing (e.g., analog processing) at the signal path 108 and provided(e.g., as analog signal version 118′) to the amplifier 110. In someexamples, however, the phase shifter 112 and/or the gain adjuster 116may be deactivated, so that the signal versions 102′ and 118′substantially coincide. The amplified test signal 104′ at the output ofthe amplifier 110 may be provided to the test processor 134. Adigitalized version 104″ of the amplified test 104′ may be provided byan analog-to-digital converter (ADC) or a RF-to-digital converter.

The test processor 134 may control the signal source 206 to sweep alonga plurality of amplitudes for the test signal 102′. Accordingly, thebuilt-in test circuit 122 may receive a plurality of amplified testsignals 104′, so as to determine the behavior of the elements of thesignal path in different states (e.g., for different amplitudes).Accordingly, the distortion information 136 and/or 138, to be providedto the mapping circuits 126 and/or 130, ma be generated on the basis ofthe comparison.

The distortion information 136 and/or 138 may be used, subsequently, inthe operating mode, e.g., for adjusting the parameters of the phaseshifter 112 and the gain adjuster 116, in order to keep into account thedistortion to which the signal is subjected in the amplifier 110.

In some examples, during the test mode, the built-in test circuit 122may control at least one of the mapping circuits 126 and 130, theenvelope detector 120, the phase shifter 112, the gain adjuster 116, theamplifier 110 and 110 b, so as to derive the most appropriated mappingof the envelope of the input signal into the phase shifts and/or gainadjustments. For example, in the test mode, the built-in test circuit122 may control, besides the amplitude of the test signal, also theamplifications of the mapping circuits 126 and/or 130 (e.g., bycontrolling the outputs 136 and/or 138): the values of the signals 136and/or 138 which minimize the distortion may be used as the distortioninformation to be provided to the mapping circuits 126 and/or 130.

Therefore, the built-in test circuit 122 may derive the distortioninformation, which is to be used for adjusting the mapping of theenvelope to the phase shift and the gain on the basis of the distortioninformation obtained in the test mode.

In examples, at least one of the test processor, the signal source, theDAC or the digital-to-RF converter, the ADC or the RF-to-digitalconverter, and one of the mapping circuits may be part of the built-incircuit 122 and/or the signal pre-distortion circuit 180. At least someof the elements may be in the same chip and/or in the same board. Insome cases, the test processor and/or the signal source 206 may beintegrated in the same the same processor (e.g., a DSP) and/or may beintegrated in the signal source which normally generates the inputsignal 102 to be amplified by the amplifier 110.

FIG. 3 shows an example of a system 300 (which may implement equipmentof any of the circuit arrangements 100 or 100 b). The circuitarrangement 300 may be used, for example, to feed a plurality of antennaelements of an antenna array, for beamforming, e.g. for a radar device(e.g., a radar device for cruise control) and/or a communicationapplication (e.g., for communication standards such as 5G). Thesedevices may be millimeter-wave devices and/or ultra-wideband devices.

The circuit arrangement 300 may comprise at least one signalpre-distortion circuit 180 or 180 b.

The circuit arrangement 300 may comprise a common signal source 334,here indicated as a digital signal processor, DSP 334 which, e.g. incooperation with a digital-to-RF converter 208, may generate a commoninput signal 102. The common signal 102 may be split at element 309(which may be a splitter/composer) to be fed to a plurality of branchesor channels. Four channels 308 ₁, 308 ₂, 308 ₃, 308 ₄ are shown in FIG.3. In different channels, analogous elements are distinguished bydifferent indexes. In the subsequent passages of the description, wherereferring to characteristics common to the all the analogous elements,the indexes will be avoided.

Each channel 308 may comprise one signal path 108, in which the signal102 is processed to provide an output signal 104.

Each signal path 108 may permit both transmission and reception ofsignals. In reception, multiple signals may be obtained by multipleantenna array and provided to the DSP 334 after having been composed byelement 308. A low-noise amplifier (LNA) 312 may be used for amplifyingthe received signal.

Each signal path 108 may also comprise elements for controlling thebeamforming, e.g., for coordinately applying weights to the signals inthe different channels. These elements are not shown in FIG. 3.

In transmission, each signal path 108 may comprise an amplifier 310(e.g., power amplifier, such as a RF power amplifier, HF poweramplifier, mmWave power amplifier, etc.), which may be one of theamplifiers 110 discussed above. As explained above, the amplifier 310may lose linearity at high amplitudes.

In order to cope with the distortions caused by the amplifier 310, afeed-forward technique may be implemented as described above. A gainadjuster 116 and/or a phase shifter 112 (which may be those discussedabove) may therefore be used as a part of the signal pre-distortioncircuit 180. In alternative examples (e.g., using a signalpre-distortion circuit 180 b), the amplifier 310 may be the amplifier110 b and the gain adjuster 116 may therefore be avoided.

In FIG. 3, elements such as the envelope detector 120, the mappingcircuits 126 and 130 are not shown.

In examples, the DSP 334 may be or have the role of the test processor134 and may control the gain adjustment and/or the phase shift with afeed-forward strategy as discussed above (e.g., by adjusting the mappingof the envelope information 124 to the phase shift and/or gain that haveto be imposed to the signal in the signal path 108). In other examples,the test processor 134 may be a processor separated from the DSP 334.

As for the circuit arrangements 100 and 100 b, the circuit arrangement300 may operate in operating mode and/or in test mode.

FIG. 4 illustrates the connections, between the DSP 334 and two channels308 ₁ and 308 ₂, that are relevant in the operating mode (DACs ordigital-to-RF converters downstream to the DSP 334 are here not shown).Apart from the index, the reference numerals are the same of those inFIG. 1A. For example, at channel 308 ₁, the signal 102 ₁ may beprocessed and be output as amplified signal 104 ₁ and fed to a firstantenna element, while at channel 308 ₂, the signal 1022 may beprocessed and be output as amplified signal 1042 and fed to a secondantenna element. Each channel 308 may comprise at least one of a signalpath 108, an envelope detector 120, and mapping circuits 126 and 130. Inexamples, each of the envelope detector 120 and mapping circuits 126 and130 is uniquely associated to one single signal path and uniquelyoperates to adjust the signal of the associated signal path.

The distortion information is in general not the same for differentchannels 308 ₁ and 308 ₂. For example, the signal at channel 308 ₁ maybe adjusted on the basis of distortion information 136 ₁ and/or 138 ₁which is in general different from the distortion information 136 ₂and/or 138 ₂ provided to adjust the signal at channel 308 ₂.

In general terms, the distortion information is different for differentchannels because different amplifiers (even if manufactured as identicalcomponents) are subjected to different distortions and cause differentnon-linear behaviors. Therefore, each signal is adjusted according to aspecific rule that keeps into account for the specific behavior of theamplifier.

Even if the distortion is compensated differently at each channel, thereis no necessity of a plurality of test processors for performingdifferent calibrations. For example, the single DSP 334 may control allthe mapping circuits 126 and/or 130 independently. In respect to thedigital feedback-based technique of the prior art, an importantreduction of hardware resources may be achieved. Notably, the presenttechnique does not sacrifice quality, as the fine adjustment of eachsignal at each channel is notwithstanding obtained.

FIG. 5 shows relevant connections for the circuit arrangement 300 intest mode. For each channel, the provision of the test signal 102′ thesignal path may be inhibited by opening the switch 204, while theprovision of amplified test signal 104′ back to the test processor 334may be inhibited by opening the switch 205. Other techniques may beused.

In test mode, each channel 308 may be fed with a test signal 102′ (e.g.,102′₁,102′₂, etc.) at one specific time instant. Each channel may becalibrated independently of the other ones (e.g., during subsequentcalibration iterations in the same calibration session). For eachchannel, a test session is performed (e.g., iteratively), henceobtaining distortion information to be provided to the mapping circuitsof the same channel. For example:

-   -   when the channel 308 ₁ is calibrated (switches 204 ₁ and 205 ₁        closed and switches 204 ₂ and 205 ₂ open), the distortion        information 136 ₁ and/or 138 ₁ is obtained;    -   subsequently (e.g., at a subsequent calibration iteration), when        the channel 308 ₂ is calibrated (switches 204 ₁ and 205 ₁ open        and switches 204 ₂ and 205 ₂ closed), the distortion information        136 ₂ and/or 138 ₂ are obtained.

Even if the DSP 334 is shown, for the sake of clarity, as beingconnected with other components through a multiplicity of lines, it ispossible to make use of techniques (such as switches, deviators, digitalencoders/decoders, etc.) which reduce the number of the input/outputpins actually used by the DSP.

The elements 126 and 130 may be, in examples, programmable (e.g.,analog) elements: they may store the received distortion information andmaintain it up to the subsequent calibration. A constant connection withthe DSP is therefore not needed.

FIG. 6 shows a circuit arrangement 600, which may be an example of thecircuit arrangement 300, and may provide a plurality of output signals604 ₁, 604 ₂, 604 ₃, 604 ₄, e.g., for beamforming (signals 604 ₁, 604 ₂,604 ₃, 604 ₄ may be RF signals, HF signals, mmWave signals, etc.). Theinput signal 602 (e.g., analog signal) may be provided by a commonsignal source 606 (which may be internal or external). The input signal602 may be split (e.g., by splitters/composers 609) into a plurality ofsignals (e.g., analog signals), each of which is fed to a differentchannel 608 (608 ₁, 608 ₂, etc.). Each channel 608 (associated to arespective signal path 108) may comprise a HF amplifier 610 (e.g., HFpower amplifier, a RF power amplifier) which may be subjected todistortion, as discussed above. Each channel 608 may comprise a phaseshifter 612 and/or a gain adjuster 616, which may be as above. Here, thephase shifter and the gain adjuster are shown as being in one singledevice PGA (phase-and-gain adjuster), but they may also be separated(e.g., as in FIG. 1a or in FIG. 1b ). The PGAs 612, 616 may therefore bepart of the signal pre-distortion circuit. Each channel 608 may includea delay generator 619 which may operate in coordination with the delaygenerators of the other channels to control the beamforming.

In operating mode, each PGA 612, 616 may condition the signal (e.g.,analog signal) in the signal path 108 to compensate for the distortionscaused by the respective amplifier 610. As for the techniques discussedabove, each PGA 612, 616 may operate by amplifying differently and/or byshifting the phase differently of the signal in the respective signal inthe signal path 108 on the basis of the detected envelope. An envelopedetector 620 (which may be a voltage detector) may detect envelopeinformation 624 concerning the common signal 602. Accordingly, the gainand the phase shift at the PGA 612, 616 may be adjusted. A processor 634(which may also have the function of test processor and/or may be a DSPand/or which may be of the built-in type) may control the operations inreal time.

In test mode, each channel 608 may be calibrated, e.g., by determiningthe preferred relationships that have to be chosen for mapping theenvelopes into gains and/or phase-shift at the PGA 612, 614. Forexample, techniques as discussed above may be used.

In particular, in the test mode, instead of the input signal 602, a testinput signal 602′ may be injected by the common signal source 606.Accordingly, a detector 640 may be used for determining the testamplified signal 604′.

The detector 640 may comprise an IQ (inphase-quadrature) determinerwhich may provide a version (which may be analog) of the amplified testsignal 604′ in the IQ space. The IQ determiner may be configured to:

-   -   multiply a version of the amplified test signal by a local        oscillator (LO) signal, so as to provide the I version of the        amplified test signal 604′; and    -   multiply a delayed version (delayed of 90°) of the amplified        test signal by the LO signal, so as to provide the Q version of        the amplified test signal 604′.

The I and Q versions of the amplified test signal 604′ may be convertedinto digital signals at the ADC 615 (or RF-to-digital converter in otherexamples), and provided to the processor 634 for determining thedistortion information.

A DC-removing filter 621 may be placed between the signal source 606 andthe splitters/composers 609. A DC-removing filter 623 may be placeddownstream of each amplifier 610. At least one of the DC-removingfilters may be a transformer-based filter (other types of filters may beprovided in other examples).

Receiving lines 613 may be provided, e.g., each in parallel to a channel608 and/or a signal path 108 (e.g., to an amplifier 610 and/or the PGA612, 616). For each channel 608, the parallel formed by the receivingline 613 and the channel 608 and/or signal path 108 may be in series to(e.g., downstream of) the respective delay generator 619.

In the example of FIG. 6, at least two of the PGAs 612, their controllogic, at least some of the envelope detector 640, the processor 634,and the amplifier 610 may coexist in the same board and/or in the samechip.

FIG. 7 shows the result of an experiment carried out with the circuitarrangement 600. An external reference oscillator frequency has beenprovided at external oscillator input 646, provided by a vector networkanalyzer. The vector network analyzer has also injected an input signal(e.g., RF signal, HF signal, mmWave signal, etc.), hence operating asthe common signal source 606. Further, the vector network analyzer hasanalysed the output signal 604 (e.g., 604 ₁). The results are shown inthe diagram of FIG. 7.

FIG. 8 shows a method 80 according to an example. The method may beimplemented, for example, by equipment as discussed above. The method 80may comprise, for example, a calibration (test) session 81 and anoperation session 84. During the calibration session 81 the circuitarrangement may be in test mode. At step 82 of the calibration session,determining distortion information (e.g., 136, 138) regarding thedistortion of a test signal (e.g., 102′) may be performed. At step 83,on the basis of the distortion information (e.g., 136, 138), determiningrelationships between envelopes of the test signal (e.g., 102′) and thephase shift and/or amplitude adjustment to be applied to the inputsignal (e.g., 102) in the operation session may be performed. Thecalibration session 81 may be performed, for example, periodically,and/or at particular time instants (e.g., when powering the circuitry).

In examples (e.g., when multiple channels and/or HF, RF, mmWaveamplifiers are present, such as in examples of FIGS. 3-6), thecalibration session may be iterative: a calibration session may comprisea plurality of calibration iterations, each calibration iteration beingrepeated for each channel and/or HF, RF, mmWave amplifier, so as toobtain distortion information associated to each channel and/or HF, RF,mmWave amplifier.

After the calibration session 81, the operation session 84 may start. Atstep 85 of the operation session, determining the envelope of the inputsignal (e.g., 102) may be performed in real time. At step 86, on thebasis of the determined relationships, mapping the envelope into a phaseshift and/or amplitude adjustment so as to shift the phase and/or adjustthe amplitude of the input signal (e.g., 102) may be performed. Inexamples, at step 87 it is checked whether it is time for performing anew calibration. For example, if an extremely high timer (e.g., 1 hour)is expired, a new calibration session 81 is initiated. Otherwise, a newoperation session 84 is initiated by invoking step 85.

Examples above may be implemented in one chip structure including acalibration processor (e.g., 134) configured to measure the distortioninformation (e.g., 136, 138) from the output of the amplifier (e.g.,110) and/or to control a mapping between the envelope information (e.g.,124) and the variable phase shift (e.g., 128) and/or the gain controlsignal (e.g., 132).

In examples above reference is often made to digital-to-RF converters,which may convert digital signals into RF signals (e.g., HF signals,mmWave signals, etc.) and to RF-to-digital converters, which may convertRF signals (e.g., HF signals, mmWave signals, etc.) into digitalsignals. The digital-to-RF converters may comprise the necessaryequipment to perform the conversion (e.g., one or more ADC, an up/downconverter, etc., in a single-stage or multi-stage configuration). WhereADCs or DACs are referred to, alternatively, a RF-to-digital ordigital-to-RF converters, respectively, whether they respectivelyinclude one or more ADC or one or more DAC or not, may be used.

Generally, examples may be implemented as a computer program productwith program instructions, the program instructions being operative forperforming one of the methods when the computer program product runs ona computer. The program instructions may for example be stored on amachine readable medium.

Other examples comprise the computer program for performing one of themethods described herein, stored on a machine-readable carrier.

In other words, an example of method is, therefore, a computer programhaving program instructions for performing one of the methods describedherein, when the computer program runs on a computer.

A further example of the methods is, therefore, a data carrier medium(or a digital storage medium, or a computer-readable medium) comprising,recorded thereon, the computer program for performing one of the methodsdescribed herein. The data carrier medium, the digital storage medium orthe recorded medium are tangible and/or non-transitionary, rather thansignals which are intangible and transitory.

A further example of the method is, therefore, a data stream or asequence of signals representing the computer program for performing oneof the methods described herein. The data stream or the sequence ofsignals may for example be transferred via a data communicationconnection, for example via the Internet.

A further example comprises a processing means, for example a computer,or a programmable logic device performing one of the methods describedherein.

A further example comprises a computer having installed thereon thecomputer program for performing one of the methods described herein.

A further example comprises an apparatus or a system transferring (forexample, electronically or optically) a computer program for performingone of the methods described herein to a receiver. The receiver may, forexample, be a computer, a mobile device, a memory device or the like.The apparatus or system may, for example, comprise a file server fortransferring the computer program to the receiver.

In some examples, a programmable logic device (for example, a fieldprogrammable gate array) may be used to perform some or all of thefunctionalities of the methods described herein. In some examples, afield programmable gate array may cooperate with a microprocessor inorder to perform one of the methods described herein. Generally, themethods may be performed by any appropriate hardware apparatus.

The above described examples are merely illustrative for the principlesdiscussed above. It is understood that modifications and variations ofthe arrangements and the details described herein will be apparent. Itis the intent, therefore, to be limited by the scope of the impendingclaims and not by the specific details presented by way of descriptionand explanation of the examples herein.

Equal or equivalent elements or elements with equal or equivalentfunctionality are denoted in the following description by equal orequivalent reference numerals even if occurring in different figures.

Element Sign circuit arrangement 100, 100b, 300, 600 signal path 108amplifier 110, 110b, 310, 610 input signal 102, 602 test signal 102′,602′ amplified signal 104 amplified test signal 104′ phase shifter 112,612 gain adjuster 116, 616 phased-shifted signal 114 amplitude-adjustedsignal 116 amplitude-adjusted 118 version of the input signal envelopedetector 120, 620 built-in test circuit 122 envelope information 124,624 test processor 134 phase shift adjustment signal 128 mapping circuit125, 126, 130 gain control signal 132, 132b built-in test circuit 122phase-related 136 distortion information gain-related 138 distortioninformation signal pre-distortion circuit 180, 180b mode control signal202 control signal 203 switch 204, 205 test signal source 206 DAC ordigital-to-RF 208 converter ADC or RF-to-digital 210, 615 converterchannel 308, 608 splitter/composer 309, 609 LNA 312 DSP 334, 634 commonsignal source 606 receiving line 613 delay generator 619 DC removingfilter 621, 623 detector for determining 640 the test amplified signal

The invention claimed is:
 1. A circuit arrangement comprising: anamplifier to amplify a modulated signal inputted to the amplifier; asignal pre-distortion circuit operative to perform a feed-forwardpre-distortion of the modulated signal in a signal path comprising theamplifier, the signal pre-distortion circuit including: an envelopedetector operative to provide envelope information describing anenvelope of the modulated signal; and a built-in test circuit operativeto generate distortion information representing a distortion in thesignal path caused by amplitude variations; the signal pre-distortioncircuit being operative to perform the feed-forward pre-distortion ofthe modulated signal based on the distortion information, in which thesignal pre-distortion circuit is operative to: apply a variable phaseshift to the modulated signal in the signal path dependent on theenvelope information, a relationship between the envelope informationand the variable phase shift being dependent on the distortioninformation provided by the built-in test circuit; and control a gain ofthe modulated signal in the signal path dependent on the envelopeinformation, a relationship between the envelope information and a gaincontrol signal applied to the amplifier depending on the distortioninformation provided by the built-in test circuit; the circuitarrangement further comprising: a plurality of amplifiers, the circuitarrangement further operable to derive a plurality of signals to beamplified by the amplifiers from a common input signal, and wherein thesignal pre-distortion circuit is operative to subject each of thederived signals to a pre-distortion amount based on distortioninformation associated to each of the amplifiers.
 2. The circuitarrangement according to claim 1, wherein the signal pre-distortioncircuit is operative to adjust the variable phase shift to followinstantaneous envelope information and provide the gain control signalto follow instantaneous envelope information.
 3. The circuit arrangementaccording to claim 1, wherein the envelope detector is operative toprovide the envelope information as an analog envelope signal, thecircuit arrangement further comprising: a mapping circuit operative to:map the analog envelope signal to an analog phase shift adjustmentsignal, and adjust the modulated signal via the analog phase shiftadjustment signal as indicated by the distortion information; and mapthe analog envelope signal to an analog gain control signal, and adjustthe modulated signal via the analog gain control signal as indicated bythe distortion information.
 4. The circuit arrangement according toclaim 1, wherein the signal pre-distortion circuit includes a mappingcircuit operable to: i) obtain a non-linear, adjustable mappingcharacteristic, and ii) adjust the non-linear mapping characteristic ofthe modulated signal depending on the envelope information.
 5. Thecircuit arrangement according to claim 1, wherein the signalpre-distortion circuit operates in an operational bandwidth greater thana modulation bandwidth of corresponding modulation used to produce themodulated signal.
 6. The circuit arrangement according to claim 5,wherein the operational bandwidth is greater than two times themodulation bandwidth of the corresponding modulation used to produce themodulated signal.
 7. The circuit arrangement according to claim 1,wherein the built-in test circuit is operative to determine thedistortion information which comprises information about anamplitude-modulation—to—amplitude-modulation distortion and aninformation about an amplitude-modulation—to—phase-modulationdistortion.
 8. The circuit arrangement according to claim 1, wherein thebuilt-in test circuit is operative to determine, in a test mode, anamplitude of an outputted test signal at an output of the amplifier toderive the distortion information and a phase of the outputted testsignal at the output of the amplifier to derive the distortioninformation.
 9. The circuit arrangement according to claim 1, furthercomprising a test signal source operative to inject a test signal intothe amplifier, the amplifier amplifying the test signal into anamplified test signal outputted from the amplifier, the test signalhaving a settable amplitude in which the built-in test circuit measuresthe distortion information relative to the amplified test signal at anoutput of the amplifier.
 10. The circuit arrangement according to claim1, operative to switch between a test mode and an operating mode, and,in the test mode, measure the distortion information and determine therelationship between the envelope information and the variable phaseshift and the relationship between the envelope information and the gaincontrol signal.
 11. The circuit arrangement according to claim 10,further operative to generate, in the test mode, a plurality of testsignals inputted to the amplifier at different amplitudes.
 12. Thecircuit arrangement according to claim 1, wherein the signalpre-distortion circuit is operative to define the distortion informationwhich comprises information associated to a state which, in a test mode,reduces distortion of an output test signal from the amplifier.
 13. Thecircuit arrangement according to claim 1, wherein the signalpre-distortion circuit is operative to comparatively increase the phaseshift and reduce the gain of the modulated signal in the signal path fora comparatively higher envelope, and comparatively reduce the phaseshift and increase the gain of the modulated signal in the signal pathfor a comparatively lower envelope.
 14. The circuit arrangementaccording to claim 1, further comprising a chip structure including acalibration processor operative to: i) measure the distortioninformation from an output of the amplifier, and ii) control a mappingbetween the envelope information and the variable phase shift and thegain control signal.
 15. The circuit arrangement according to claim 1,further comprising a chip including the signal pre-distortion circuit.16. The circuit arrangement as in claim 1, wherein the envelope detectorincludes a low pass filter operative to detect the envelope of themodulated signal.
 17. The circuit arrangement as in claim 1, wherein theenvelope information indicates a shape of the envelope of the modulatedsignal.
 18. The circuit arrangement as in claim 1, wherein the signalpre-distortion circuit is operative to: increase the phase shift andreduce the gain of the modulated signal in the signal path for aninstance of a higher detected magnitude of the envelope; and reduce thephase shift and increase the gain of the modulated signal in the signalpath for an instance of lower detected magnitude of the envelope. 19.The circuit arrangement as in claim 1, wherein the signal pre-distortioncircuit is operative to: generate the distortion information based oninput of a test signal to the signal path.
 20. The circuit arrangementas in claim 1, wherein a bandwidth of the envelope detector is greaterthan a modulation bandwidth of modulation imposed on the modulatedsignal.
 21. A circuit arrangement comprising: an amplifier to amplify amodulated signal inputted to the amplifier; a signal pre-distortioncircuit operative to perform a feed-forward pre-distortion of themodulated signal in a signal path comprising the amplifier, the signalpre-distortion circuit including: an envelope detector operative toprovide envelope information describing an envelope of the modulatedsignal; and a built-in test circuit operative to generate distortioninformation representing a distortion in the signal path caused byamplitude variations; the signal pre-distortion circuit being operativeto perform the feed-forward pre-distortion of the modulated signal basedon the distortion information, in which the signal pre-distortioncircuit is operative to: apply a variable phase shift to the modulatedsignal in the signal path dependent on the envelope information, arelationship between the envelope information and the variable phaseshift being dependent on the distortion information provided by thebuilt-in test circuit; and control a gain of the modulated signal in thesignal path dependent on the envelope information, a relationshipbetween the envelope information and a gain control signal applied tothe amplifier depending on the distortion information provided by thebuilt-in test circuit; wherein the signal pre-distortion circuit isfurther operative to: i) modify the gain of the amplifier depending onthe distortion information, the distortion information mapping arelationship of the envelope information to the gain.
 22. A methodcomprising: a calibration session including operations of: producingdistortion information regarding distortion of a test signal amplifiedby an amplifier, the distortion information indicating relationshipsbetween envelopes of the test signal and corresponding phase shifts andgain adjustments to be applied to an input signal of the amplifier in anoperation session; the operation session including operations of:determining an envelope of the input signal; and via the distortioninformation, mapping the determined envelope into a phase shift amountand an amplitude adjustment amount; and applying the phase shift amountand the amplitude adjustment amount to the input signal to produce anoutput signal from the amplifier, the output signal being phase shiftedand amplitude adjusted with respect to the input signal as specified bythe phase shift amount and the amplitude adjustment amount; wherein thecalibration session further comprises: performing a plurality ofiterations, each iteration of the plurality of iterations determiningdistortion information of one particular amplifier among a plurality ofamplifiers.
 23. The method according to claim 22, wherein thecalibration session is one of multiple calibration sessions, each of thecalibration sessions being performed at intervals greater than 3600seconds.
 24. A beamforming method comprising the method according toclaim 22; and the beamforming method further comprising: feeding anantenna array with amplified output signals of the amplifier generatedduring the operation session.
 25. A non-transitory storage unit storinginstructions which, when executed by a processor, cause the processor toperform the method according to claim
 22. 26. The method of claim 22,wherein applying the phase shift amount and the amplitude adjustmentamount to the input signal includes: performing feed-forward distortionof the input signal via application of the phase adjustment amount andthe gain adjustment amount to the amplifier, the input signal being amodulated signal.
 27. The method as in claim 22, wherein producing thedistortion information includes: inputting the test signal into theamplifier prior to determining the envelope of the input signal; andproducing the distortion information based on an output of the amplifieramplifying the test signal at different amplitudes.
 28. The method as inclaim 22 further comprising: during the operation session, producing theoutput signal from an output of the amplifier without feedback from theoutput of the amplifier.
 29. An apparatus comprising: a circuitoperative to: detect an envelope of a modulated signal inputted to anamplifier; via distortion information generated during testing of theamplifier, map the detected envelope of the modulated signal to a phaseadjustment value and a gain adjustment value; and apply the phaseadjustment value and the gain adjustment value to the amplifier, theamplifier operative to adjust the modulated signal into an amplifiedoutput signal outputted from an output of the amplifier based on thephase adjustment value and the gain adjustment value; wherein thecircuit is further operable to perform feed-forward distortion of themodulated signal via application of the phase adjustment value and thegain adjustment value to the amplifier; wherein the circuit furthercomprises: a tester operative to: i) input a test signal into theamplifier prior to detection of the envelope, and ii) produce thedistortion information based on an output of the amplifier amplifyingthe test signal; and wherein the distortion information maps envelopesof the test signal to phase adjustment values and gain adjustmentvalues.
 30. The apparatus as in claim 29, wherein the circuit is furtheroperable to produce the distortion information mapping envelopes of thetest signal to phase adjustment values and gain adjustment values basedon adjusting an amplitude of the test signal.
 31. The apparatus as inclaim 29, wherein the circuit is operative to produce the amplifiedoutput signal outputted from the amplifier without feedback from theoutput of the amplifier.
 32. A circuit arrangement comprising: anamplifier to amplify a modulated signal inputted to the amplifier; asignal pre-distortion circuit operative to perform a feed-forwardpre-distortion of the modulated signal in a signal path comprising theamplifier, the signal pre-distortion circuit including: an envelopedetector operative to provide envelope information describing anenvelope of the modulated signal; and a built-in test circuit operativeto generate distortion information representing a distortion in thesignal path caused by amplitude variations; the signal pre-distortioncircuit being operative to perform the feed-forward pre-distortion ofthe modulated signal based on the distortion information, in which thesignal pre-distortion circuit is operative to: apply a variable phaseshift to the modulated signal in the signal path dependent on theenvelope information, a relationship between the envelope informationand the variable phase shift being dependent on the distortioninformation provided by the built-in test circuit; and control a gain ofthe modulated signal in the signal path dependent on the envelopeinformation, a relationship between the envelope information and a gaincontrol signal applied to the amplifier depending on the distortioninformation provided by the built-in test circuit; wherein the amplifieris a variable gain amplifier, the gain of the modulated signalcontrolled via input of the gain control signal to the variable gainamplifier.